Memo Series Documents

The Memo Series is a set of documents describing initial design plans and ideas for the WIDAR concept.

The following documents are listed by Memo number.

Doc. #Document TitleDateAuthor
#001A proposed WIDAR Correlator for the EVLA Project: Discussion of Capabilities, Implementation, and Signal Processing18May2000B. Carlson
#002An Analysis of the Effects of Phase Dithering in a Lag-based Fringe-Stopping XF Correlator26May2000B. Carlson
#003A Closer Look at 2-Stage Digital Filtering in the Proposed WIDAR Correlator for the EVLA29Jun2000B. Carlson
#004A More Detailed Analysis of 'Recirculation' Architecture, Algorithms, and Limitations in the Proposed WIDAR Correlator for the EVLA06Jul2000B. Carlson
#005Summary of Discussions Held During the July 10-14, 2000 Workweek in Socorro Regarding the EVLA-WIDAR Correlator22Aug2000B. Carlson
#006Two Correlators for the Price of One: How a VLBA Correlator Could Fit Within the Proposed 40-Station WIDAR EVLA Correlator28Sep2000B. Carlson
#007Simulation Tests of a Sub-Sample Delay Tracking in the Proposed WIDAR Correlator for the Expanded Very Large Array03Oct2000B. Carlson
#008Simulation Tests of Phasing Subsystem Signal Processing in the WIDAR Correlator for the EVLA07Nov2000B. Carlson
#009Simulation Tests to Quantify the Spectral Dynamic Range and Narrowband Interference Robustness of the WIDAR Correlator for the EVLA01Nov2000B. Carlson
#010Requirements for 8-bit Processing in the Proposed WIDAR Correlator for the EVLA29Jan2001B. Carlson
#011WIDAR Correlator Sensitivity Losses30Jan2001B. Carlson
#012Concept for an "Observation Builder" for Array and Correlator Configuration20Feb2001B. Carlson
#013Operator Interface Concepts for Array and Correlator On-line Monitor and Control27Feb2001B. Carlson
#014Refined EVLA WIDAR Correlator Architecture02Oct2001B. Carlson
#015EVLA Correlator Monitor and Control System, Test Software, and Backend Software Requirements and Design Concepts23Jan2002B. Carlson
#016EVLA Correlator Monitor and Control System: Scheduling and Activating the Configuration Data27Jun2003S. Vrcic
#017Thermal Analysis of Cooling Strategies for the EVLA Correlator Baseline Board02Sep2004B. Carlson
#018Technical, Functional, and Performance Discussion Document - MCCC Software - Generating Baseline Board Configuration Based on the Configuration of Station Boards, a Proposal08Feb2004S. Vrcic
#020Wideband High Resolution Autocorrelator Configurations Using WIDAR Correlator Components15Oct2004B. Carlson
#021EVLA Correlator Laboratory Requirements in Penticton08Dec2004B. Carlson
#022Alarm Handling and Logging (Technical, Functional, and Performance Discussion Document)26Jan2005S. Vrcic
#023Additional Tests of Correlator Chip Functionality as Required by the Correlator Chip Critical Design Review14Mar2005B. Carlson
#024EVLA 'WIDAR' Correlator System Description for the Preliminary Design Review17Jun2005B. Carlson
#025EVLA Correlator Rack Thermal Performance and Test Results Spreadsheet (Dynamic)29Nov2005M. Halman
#026EVLA Correlator Output Data Format, Rev. 1.321Nov2005S. Vrcic
#027EVLA Correlator Network Traffic Performance Analysis16Oct2006S. Vrcic
#028An Optimized Connectivity Scheme for the EVLA Correlator13April2007B. Carlson
#029The Optimized Connectivity Scheme Baseline Board Configuration10July2007S. Vrcic
#030Mapping Names, Locations & IP Addresses of Embedded Components in the EVLA WIDAR Correlator19May2007K. Ryan
#031WIDAR EVLA Correlator Configuration Transition Plan 200904Feb2009B. Carlson
#032Anti-Aliasing and Bin-Centered Tone Investigations - Addendum24Mar2011B. Carlson