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00031 #ifndef _ASM_ARCH_RTAI_TIMER_H_
00032 #define _ASM_ARCH_RTAI_TIMER_H_
00033
00034 #include <linux/time.h>
00035 #include <linux/timer.h>
00036 #include <asm/mach/irq.h>
00037 #include <linux/timex.h>
00038
00039 #include <asm/arch/rtai_arch.h>
00040 #include <asm/arch/at91_tc.h>
00041
00042
00043
00044 static inline unsigned int at91_tc_read(unsigned int reg_offset)
00045 {
00046 unsigned long addr =
00047 (AT91_VA_BASE_TCB0 + 0x40 * CONFIG_IPIPE_AT91_TC);
00048
00049 return readl((void __iomem *)(addr + reg_offset));
00050 }
00051
00052 static inline void at91_tc_write(unsigned int reg_offset, unsigned long value)
00053 {
00054 unsigned long addr =
00055 (AT91_VA_BASE_TCB0 + 0x40 * CONFIG_IPIPE_AT91_TC);
00056
00057 writel(value, (void __iomem *)(addr + reg_offset));
00058 }
00059
00060 extern notrace unsigned long long __ipipe_get_tsc(void);
00061 extern notrace void __ipipe_set_tsc(unsigned long long value);
00062
00063 static inline void rtai_at91_update_tsc(void)
00064 {
00065 __ipipe_set_tsc(__ipipe_get_tsc()+rt_times.periodic_tick);
00066 };
00067
00068 extern unsigned int rt_periodic;
00069
00070 static inline RTIME rtai_rdtsc(void)
00071 {
00072 if(!rt_periodic)
00073
00074
00075
00076 return __ipipe_mach_get_tsc();
00077 else
00078
00079
00080
00081
00082 return __ipipe_get_tsc()+at91_tc_read(AT91_TC_CV);
00083 }
00084
00085 static inline void rt_set_timer_delay(unsigned long delay)
00086 {
00087 if (delay) {
00088
00089
00090
00091 __ipipe_mach_set_dec(delay);
00092 } else {
00093
00094
00095
00096
00097 }
00098 }
00099 #endif